POTSDAM - More than 100 researchers from several high- technology companies, suppliers and universities from the United States, Japan, Korea, China, Taiwan, Belgium, and Canada, gathered in Lake Placid in August for the 18th International Symposium on Chemical-Mechanical Planarization (CMP), sponsored by Clarkson Universitys Center for Advanced Materials Processing (CAMP).
Speakers included engineers and scientists from IBM, Intel, Micron, GLOBALFOUNDRIES, Samsung, SEMATECH, Ebara, Dow Electronic Materials, Cabot Micro, Applied Materials, Pall, Entegris, Fujimi, Fujiplanar, IMEC in Belgium and others. University speakers were from Kyushu University and Kyushu Institute of Technology, and Shizuoka from Japan, SKKU and Hanyang from Korea, National Taiwan University, and CNSE and Clarkson.
Chemical-mechanical planarization or chemical-mechanical polishing - CMP for short - is a process that uses nano-sized abrasives in a reactive chemical dispersion to polish various layers on the surface of wafers used in semiconductor fabrication to achieve nanolevel planarity (a flat and uniformly smooth surface).
CMP is an enabling technology that translates into faster computers, more realistic video games, smaller cell phones and more efficient performance from the various electronic devices we use daily in our homes and businesses.
Since the wafers typically have a 300 mm diameter, this planarity extends over an eight-orders-of-magnitude length scale.
This technology plays a critical role in todays microelectronics industry and is the ideal planarizing technology for use with the interlayer dielectrics and metal films used in all forms of logic and memory devices extending down to14 nanometer feature sizes. Clarkson University and CAMP are internationally recognized for expertise in this remarkable technology.
This years event focused on several fundamental aspects of chemical-mechanical planarization, including particle and colloidal aspects, polishing mechanisms, pad/conditioning behavior, flow characterization, copper/barrier film planarization, defects and post-polish cleaning, low-k films and integration challenges, 300 mm wafer issues and transition to 450 mm, STI (shallow trench isolation), Nitride/Poly (silicon nitride/polysilicon) and polishing of new channel and barrier materials like germanium, indium phosphide, ruthenium, cobalt, silicon carbide, etc.
Distinguished University Professor S.V. Babu, the director of CAMP, served as the lead organizer of this years symposium, as he has for the past 17 years. He was assisted by co-chairs Hirokuni Hiyama (division executive for technologies, R&D, IP Division at Ebara Corporation in Japan), Jin-Goo Park (professor, Department of Materials Engineering and vice dean at Hanyang University in Korea), Charan Surisetty (unit process engineering professional at IBM), Joseph Steigerwald (Intel fellow; technology and manufacturing group and director of Chemical Mechanical Polish Technology), Matt Prince (principal engineer, Intel), Lee Cook (technology fellow and Global Slurry R&D director, Dow Electronic Materials), and Rajeev Bajaj (director at Applied Materials).
Monday nights after dinner speaker, Mark Dougherty (IBM director – Unit Process Development, SRDC- IBM Microelectronics Division), was introduced by Clarkson University President Tony Collins. He delivered an insightful talk, titled The Silicon Process Roadmap: Where is it Taking Us?
Tuesday evening featured an award and recognition for CAMP Deputy Director John (Jack) Prendergast as he retires. Distinguished University Professor / CAMP Director S.V. Babu presented an award to Jack for his excellent contributions to CAMPs success.
The symposium included a poster session dedicated to the memory and contributions of the late Clarkson Prof. Yuzhuo Li.